AnsweredAssumed Answered

AD8285 Application problem

Question asked by jaana_jia on May 15, 2018

Hello! 

When using the AD8285 for the first time, I would like to ask questions about CLK+, CLK-. I created two routes through the AD9515BCPZ (clk is 40mHz). 

Output Phase offset = 0;

OUT0 Can Be Divided by 16; 

OUT0: LVPECL

OUT1: LVDS 

Out0 is provided to AD8285. I want to ask if the generated 40m÷16=2.5m is satisfied. Or are there other ways? Thank you 

Also ask about the role of AUX, MUXA, and DSYNC. I do not really get it.

 

第一次使用AD8285,想问CLK+,CLK-的问题。我是通过AD9515BCPZ(clk为40mHz)产生两路,

Output Phase offset = 0;
OUT0 Can Be Divided by 16;

OUT0: LVPECL
OUT1: LVDS

out0 提供给AD8285。想问产生的40m÷16=2.5m,是否满足使用。还是有其它方法?谢谢

另外询问一下AUX,MUXA,以及DSYNC的作用。我不是很明白。

Outcomes