I am interested in procuring the AD-FMCDAQ3-EBZ for one of our projects. I needed more information on the max throughput we can get from the board using the reference designs when interfaced with one of the FPGA eval boards like KCU105?
Specifically - If I am running the ADC channels at 1GS/s each, does the reference designs give the ability to write the data to the KCU105 2GB DDR4 memory without any drop outs. As in will I get close to 0.5 sec data as expected at this rate ( 1GS/s * 14 bits/sample * 2channels * 0.5 secs)
Are such large and continuous data acquisitions possible with the eval board and the reference designs and if yes, how is the raw data stored?