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Clarification on the ADuC7023 I2C Master read count register

Question asked by jwalther on Dec 14, 2011
Latest reply on Dec 29, 2011 by MikeL

In the Data sheet for the ADuC7023 microcontroller it states that the Master Read Count Register is a 7-bit count with a 1-bit repeat count for reads larger than 256 bytes.  In AD-895 for the ADuC702x family is states that the count register is only 3 bits allowing for an 8 bit read.  Is the data sheet correct?


We are seeing a problem with a read of 0x3c bytes finishing and then another interrupt of a finished read that we don't think we initialted.  In either case the Current Read Count register is still 0.


When is the actual transmit started for a read of a slave device?

Should we clear the rx interrupt when a complete interrupt is recieved?


Any information you could point us to specifically for the 7023 part would be appreciated.