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BF561 PLL Setting problem

Question asked by deepak on Dec 14, 2011
Latest reply on Dec 21, 2011 by PrasanthR

Hello

 

i am using BF561 EZ kit lite Board Rev 2.3.Here i am trying  to change the PLL settings and to monitor the above changes i am  tapping the SCLK at Pin 85 of J2 extender.
my problem is that

 

1. whenever i use HPUSB ICE Emulator then any change in PLL_CTL register appears after i compile and run my code Twice.
2.when i fuse LDR to flash then even after booting again and again PLL_CTL change does not reflect in SCLK.

 

Here is my simple code :

 

#include <defBF561.h>
#include <cdefBF561.h>
#include <sysreg.h>
#include <services/services.h>
#include <ccblkfn.h>
#include<stdio.h>
#include <sys/exception.h>

 

 

 

void main()

 

{
unsigned int imask;

 

       //Enable SCLK1 for asynchronous memory region accesses. So that we can probe on the SCLK1 signal
     *pEBIU_AMGCTL=0x1;
   
        *pVR_CTL = 0x00DB;
           
   *pSICA_IWR0 = 0x01;
   *pSICA_IWR1 = 0x00;
    ssync();
    imask = cli();  

 


   
    *pPLL_CTL = 0x2000 ;
    ssync();
idle();           
           
           
    *pPLL_DIV = 0x0006 ;
    ssync();
    sti(imask);  
   
}

 

please reply as soon as possible.

 

Regards

 

Deepak

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