I'm trying to debug on a ADSP-21584, having a very large program on Core1 using SDRAM for heap, data memory and also program code (otherwise it doesn't fit in).
In order to do debugging (and downloading the code into the core / sdram), I had to set within the debug configuration for Core1 "Reset, Check Si-revision, Run After Load" and for Core2 "Check Si-revision, Run After Load".
If I don't uncheck "Reset" on Core2, the loading of Core1 fails with error message "Error loading section "dxe_sdram_sw_code" to target."
Now I want to add code to second core and the debugger also showing, that the code is loaded, but the programm doesn't reach the main() function and when stopping the processor it shows an idle loop in disassembly.
Next step I created an empty project within the IDE for 21584. The empty project itselfs runs fine, but both core have the "Reset Core" checkbox on. If I remove "Reset" on Core 2, I have the same behaivor as above.
So my conclusion is, that I need to reset both Cores for debugging (so also the Core2), but I can't because the SDRAM will not get loaded in Core1 if I do so.
So the question:
How can I debug a programm, having a big program using SDRAM in Core1 and another (smaller) program in Core2?
IDE: CrossCore 2.7.0
(The LDF files are generated by IDE, I just enabled SDRAM on Core1)