AnsweredAssumed Answered

SHARC 21479 software reset, held in reset

Question asked by mark.doherty on May 2, 2018
Latest reply on May 11, 2018 by Jithul_Janardhanan

I have a custom board.

The boot mechanism boot stream is SPI Port Booting - Master Boot Mode from Serial flash (M25P16).


I perform a software reset and about 1 in 10 times the processor is held in reset and therefore doesn't boot.

snippit:-

 

 

*pSPICTL=0x0;

*pSPIFLG=0x0;

*pSPIDMAC=0x0;

*pSPIBAUD=0x0;

...


*pSYSCTL = SRST

 


ICE after:

SYSCTL 00000001 System Control Register (SRST)

SYSTAT 00000001 System Shared Bus Status (BSYN)

RUNRSTCTL 00000001 Running Reset Control Register (PM_RUN_RST_PINEN)

 


ADSP21479BBCZ2A, Pin J4 is o/c (/RESETOUT, /RUNRSTIN)

 


It always successfully boots from a power reset and from de-asserting the /RESET input.

Looking through the documentation it is not clear what could hold it in reset.


As I understand it, whilst its held in reset the SPI boot won't occur, because the SRU routes the PCICLK, and the

DPI Default Routing is only applied when the processor comes out of reset. (SPI_CLK_I, SPI_CLK_O, PBEN_O to DPI Pin03)

 


I do drive the /RESET from external logic but I would not expect it to be driven at the same time as the SRST is set.

 

Its no easy for me to gain access to the internals.

 


Is there any other information I can gleam from the emulator, or modifying code?

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