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[ADIS16460] DEC_RATE and FLTR_CTRL register setting issues

Question asked by qzhou on May 1, 2018

We want to configure the ADIS16460 output rate to be around 100 Hz and the bandwidth to be somewhere between 30-40 Hz. We tried to configure both the DEC_RATE (which controls the samples per second (SPS) and I will refer to as D) and FLTR_CTRL[2:0] (which controls the bandwidth and I will refer to as B) registers to make use of ADIS16460 internal filter; however, we came across the following problems.

 

We implemented the following code to derive the sensor measurements:

 

int16 receive_low, receive_out;

int32 receive;

receive_low = Read_ADIS164XX (XACCL_LOW)

receive_out = Read_ADIS164XX (XACCL_OUT)

receive = ((int32) receive_out << N + receive_low >> (16-N));

 

acc_scale_factor = 1.0/(4000*2^N)

gyr_scale_factor = 1.0/(200*2^N);

 

  1. We tried the configuration DEC_RATE = 0 (SPS:  2048), FLTR_CTRL = 4 (BW: 41 Hz). In this case, the D=0, B=4 and the NBG (Number of bits for bit growth) = 4 and we are able to derive the correct inertial sensor measurement.
  2.  We tried the configuration DEC_RATE = 4, FLTR_CTRL = 5 as the example in datasheet. In this case, the D=4, B=5 and the NBG = 6. But we cannot derive the normal sensor measurement (For example, the z-accel should measure 9.8 m/s2 but we get around 49 m/s2)
  3. We tried the configuration DEC_RATE = 0x0F and FLTR_CTRL = 0. In this case, the D=15 and B=0 and NBG=4; however, we also cannot derive the normal sensor measurement.

 

Because we derive the correct measurement first with the configuration DEC_RATE = 0 and FLTR_CTRL =4 , we believe that our implemented code is right; however, after when trying different configurations, the sensor output is always wrong. so, could you help us solve this problem?

 

Some other issues are.

  1. While debugging, we found is that the accelerometer lower output will always be 0 or 0xFFFF. Is this normal?
  2. If we set the DEC_RATE to 19 and leave the FLTR_CTRL as default. What will be the bandwidth of output signal (will it be 50Hz?)?
  3. If we set the DEC_RATE = 9 and the FLTR_CTRL = 1; then the NBG will be calculated as 3.3. In this case the bits growth will be 3 or 4?

 

Thank you very much for your time

BR

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