I have an AD9959 device whose clocks (Ref-Clk/Ref_Clk*) are being driven with a LVPECL 25Mhz driver and capacitively coupled into the chip pins (0.1uF). I have never gotten it to do anything. CLK_MODE is grounded. After power-on or Master_Reset, there is no Sync_Sclk present and chip doesn't seem to work with any configuration I set via SPI. The clock signals are clean and with both inputs at 0.8V p-p with a differential voltage of 1.6v at the chip. The inputs are capacitor coupled into the chip. Average voltage at the chip is about 1.4V.. Supplies are 3..3V (DVDD_IO) and the others 1.8V. PWR_Down is ground, master_reset is low. Kind of out of options. Does anyone have any ideas on how to get the clock working?