I believe that there is an undocumented errata in the B60x Hardware Reference 0.5. Specifically the PWM A, B, C and D channel control registers say for DISLO and DISHI that 0 is disabled, 1 is enabled. However it seems the adi_pwm_OutputEnable() operates correctly and this works with DISLO and DISHI such that 0 is enabled, and 1 is disabled, which makes sense given the name DISLO is Channel Low Side Output Disable and DISHI is Channel High Side Output Disable. I have check the documentation errata Data Sheet Errata | Analog Devices and it does not seem to show an errata in this area. Please can you confirm this is wrong.