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AXI_9371 HDL code interface definition

Question asked by centercitybill on Apr 20, 2018
Latest reply on Apr 23, 2018 by Vinod

I am designing a custom board that utilizes the AD9371 transceiver. The JESD204B bus is connected to an Artix 7 fpga. The Artix 7 is utilized to transmit/receive the ADC and DAC samples to/from our CPU via the PCIe gen2 x4 bus. I want to use the AXI_9371 HDL code to connect between the JESD204B interface and PCIe interface. Do you have a document that defines the handshaking protocal used on the interfaces of the AXI_9371 HDL code? Thanks.

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