I'm troubleshooting an existing design and wonder if the design is flawed. One ADCLK925 is feeding a second one. The first 925 misbehaves -- there is mostly no activity on the non-inverted outputs but the inverted outputs look more or less okay. This is with a 100MHz clock. The non-inverted outputs look intermittently okay, but most of the time they are just a constant level maybe around 2.4V or so.
This design is different than recommended by the data sheet, and the guy who designed is no longer around. In this design, there are no resistors (e.g. 100 or 150 ohms) from each output to ground on the first 925. Instead, there is a only 40 ohm resistor from Vt to ground on the downstream 925. Should this work?
The input side of the first 925 is setup similarly (40-ohm resistor from Vt to ground) and there is a differential clock present there (600-800mVp-p) with average levels of 1.8V (the 925's Vcc is 3.3V). Is this average level too high? Should it be (Vcc-2) or 1.3V?
All of the 925's have their Ref pins floating.
Any thoughts as to what the problem might be are appreciated.