AnsweredAssumed Answered

ADV212  HIPI encode mode worked, while HIPI decode mode failed

Question asked by franky on Dec 12, 2011
Latest reply on Jan 16, 2012 by DaveD

Hello everyone,

there's a problem when i use the ADV212 in HIPI decode mode.
The HIPI encode mode worked correctly, while the HIPI decode mode failed.
It worked with ADV212 to compress the 640*480 YCBCR picture, with the following Encode initialization in HIPI mode,
but in HIPI decode mode, the outcome are the same 32-bit datas, which were read from the pixel fifo.
The following is my Encode initialization and Decode initialization, is there something wrong in my initializiton?
ps: The MCLK is 65Mhz, 640*480,4:2:2,YCBCR
ENCODE initializiton:
(1)
1. Write 0x00000008 to the PLL_HI register, 0x00000084 to the PLL_LO register
2. Wait for 1ms
3. Write 0x0000008A to the BOOT register
4. Write 0x0000000A to BUSMODE
5. Write 0x0000000A to MMODE
6. Write 0x00050000 to IADDR
7. Load <encode_2_13_0.sea>
8. Write 0x0000008D to the BOOT register
9. Write 0x0000000A to BUSMODE
10.Write 0x0000000A to MMODE
(2) Pre-initialization Routine for ADV202
1. Write 0x00057F00 to IADDR
2. Write 0x04000503 to IDATA
3. Write 0x01000000 to IDATA
4. Write 0x02000500 to IDATA
   Write 0x00000002 to IDATA
5. Write 0xFFFF0400 to IADDR (0xb); select PMODE register
   Write 0x00150000 to IDATA (0xc); 8-bit YCbYCr
   Write 0xFFFF040C to IADDR (0xb); XTOT
   Write 0x05000000 to IDATA (0xc); 1280
   Write 0xFFFF0410 to IADDR (0xb); YTOT
   Write 0x01E00000 to IDATA (0xc); 480
   Write 0xFFFF044C to IADDR (0xb); VMODE
   Write 0x00120000 to IDATA (0xc), Host mode enabled for HIPI encode mode
(3) Initialization Routine for ADV202
1. Write to 0x0400 to EIRQIE
2. Wait for IRQ to be asserted
3. Read SWFLAG to ensure the program has correctly initialized (i had read the data->0xFF82)
(4) configure DMA channel 0 for pixel input
1. Write 0xFFFF1408 to IADDR
2. Write 0x01100000 to IDATA
3. Write 0xFFFF1408 to IADDR
4. Write 0x01110000 to IDATA
(5) configure DMA channel 1 for compressed data output
1. Write 0xFFFF140C to IADDR
2. Write 0x01120000 to IDATA
3. Write 0xFFFF140C to IADDR
4. Write 0x01130000 to IDATA
(6) Start program for ADV202
Write 0x0400 to EIRQFLG on the ADV202 to clear the software interrupt [SWIRQ0] and start the program
DECODE initializiton:
(1)
1. Write 0x00000008 to the PLL_HI register, 0x00000084 to the PLL_LO register
2. Wait for 1ms
3. Write 0x0000008A to the BOOT register
4. Write 0x0000000A to BUSMODE
5. Write 0x0000000A to MMODE
6. Write 0x00050000 to IADDR
7. Load <decode_2_16_1.sea>
8. Write 0x0000008D to the BOOT register
9. Write 0x0000000A to BUSMODE
10.Write 0x0000000A to MMODE
(2) Pre-initialization Routine for ADV202
1. Write 0x00057F00 to IADDR
2. Write 0x04000003 to IDATA
3. Write 0x00000000 to IDATA
4. Write 0x00000002 to IDATA
5. Write 0xFFFF0400 to IADDR (0xb); select PMODE register
   Write 0x00150000 to IDATA (0xc); 8-bit YCbYCr
   Write 0xFFFF040C to IADDR (0xb); XTOT
   Write 0x05000000 to IDATA (0xc); 1280
   Write 0xFFFF0410 to IADDR (0xb); YTOT
   Write 0x01E00000 to IDATA (0xc); 480
   Write 0xFFFF044C to IADDR (0xb); VMODE
   Write 0x00100000 to IDATA (0xc), Host mode enabled for HIPI decode mode
(3) Initialization Routine for ADV202
1. Write to 0x0400 to EIRQIE
2. Wait for IRQ to be asserted
3. Read SWFLAG to ensure the program has correctly initialized(i had read the data->0xFFA2)
(4) configure DMA channel 0 for pixel input
1. Write 0xFFFF1408 to IADDR
2. Write 0x01100000 to IDATA
3. Write 0xFFFF1408 to IADDR
4. Write 0x01110000 to IDATA
(5) configure DMA channel 1 for compressed data output
1. Write 0xFFFF140C to IADDR
2. Write 0x01120000 to IDATA
3. Write 0xFFFF140C to IADDR
4. Write 0x01130000 to IDATA
(6) Start program for ADV202
   Write 0x0400 to EIRQFLG on the ADV202 to clear the software interrupt [SWIRQ0] and start the program

Outcomes