Hello engineers and researchers,
I'm working on a Zynq Z-7000 SoC + FMCOMMS5 (Dual AD9361) platdorm, and I want to selectively chose one of the 4 RF-Tx ports of AD9361 and turn ON and OFF that selected RF-TX port. My designing platform is Vivado (latest version), HDL-verilog. I'm newbie in this area, so please guide me and provide some guideline, like what are the IP is needed, over all structure of the Ip layer, stages etc.
It will be very helpful if I get some references so that I can fulfill my project.