I am having tough times with the AD7656-1. It is connected in hardware mode, with internal reference, VDD/Vss +/-6.0V, input +/-5.0V max., input channels V1-V4, no STANDBY, CONVSTA+CONVSTB tight together, SPI interface, no daisy chaining. The device gets ONE reset pulse after a power up (see image) and is used in "single shot" mode, i.e. not equidistantly sampling. After CONVST -> high, the BUSY is high for ca. 2.6µs. When the conversion is complete, the chip select is tight low and the 4 16-bits channels are clocked out to the processor. The clock speed is 10 MHz in the picture, but the problems described below occur at slower speeds as well.
Now to the problem:
1. When I slowly change the DC voltage on V1 .. V4 (like 50 mV/s) and run the conversion every say 1 second, sometimes one of the digital outputs gives out the same value twice (like the voltage had not increased in the last second), but only on a single channel, the other channels are converting.
2. When applying a constant voltage on V1..V4, often the lowest 8 bits of a signle channel are not changing at all, like there were completely no noise on that signal. Other channels work.
It seems to me, that the digital core is sensitive to some condition, I cannot identify. What could be that? I tried giving a reset pulse after each conversion, but that did not help.
Schematics and a picture of logical signals are attached.
Thanks for a help!