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Fast AGC setting

Question asked by pohchuan.leng on Apr 11, 2018
Latest reply on Apr 12, 2018 by srimoyi

Hi, I would like to ask some questions regarding ZSDR Comms – AD9361. we are currently working on the controlling the AD9361 for fast attack AGC.


According to the AD9361 UG-570 Reference Manual (p.g. 46). Our baseband can use EN_AGC control pin to unlock and restart fast AGC (when it is already running) so that it can re-lock to a new gain index. We have RF front end gain that needs to be adjusted to command the reset of fast AGC.


EN_AGC control pin is available on our custom board and we also have software to pull the EN_AGC high. However, when we pull the pin high, nothing happens to fast AGC. We do not see any of the following takes effect through the dedicated control output pins:


1) Gain Lock goes low;


2) Rx Gain changes;


3) AGC state changes;


Prior to this we have AGC that works fine in unlocking and locking the gain depending on various overloads conditions.


We followed UG-570 to set bits in 0x0FB[D6], 0x111[D5] and clear bits in 0x110[D6:D5] so that the gain is set maximum once AGC restarts.


Kindly advise if we have missed out any steps in configuring the AD9361 fast AGC.