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Few random questions about the AD9208 operation

Question asked by JohnDean on Apr 11, 2018
Latest reply on Apr 22, 2018 by UmeshJ

Hi there,

 

While operating the AD9208-3000EBZ with the ADS7-V2 and reading the manual data sheet : http://www.analog.com/media/en/technical-documentation/data-sheets/ad9208.pdf 

I came up with some things not so clear:

 

1. In the datasheets it says : "This product is designed to support communications applications capable of direct sampling wide bandwidth analog signals of up to 5 GHz. The −3 dB bandwidth of the ADC input is 9 GHz. " - what does it mean 9GHZ bandwidth when the input is up to 5GHZ? Also, what is the minimum fund frequency and clock that can be input?

 

2. What is the optimal Ain for this ADC model? I've seen that tests were made for -2dBFS and -9dBFS only:

 

3.It seems like the tests made on this ADC were made with an input of a CW. Any tests were performed to a signal with a bandwidth?, if so please refer me to them.  

 

4. In the tests, the lowest input frequency tested is 255MHZ, are there any results performed under 100MHZ ?

5. Is there any syncing (phase/sampling, etc.)  between the clock inputs in the AD9208 and the REF CLK in the evaluation board?

6. What kind of clock is the REF CLK ? (sin, squared, etc.) and what are the voltage levels defined for it?

 

Thank you for your patience and sincere reply,

 

Yours truly, John.

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