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USB enumeration failure on a custom board

Question asked by gudjon on Dec 9, 2011
Latest reply on Dec 10, 2011 by gudjon

Hi

    I have been using the usb_loopback program on a BF526_EZBRD test board with nice results

but now I have made a custom board with a BF524 revision 0.2 and SDRAM (MT48H32M16-75) similar to the EZBRD board. I am using

VisualDSP++ and an ADZS-USB-ICE emulator for the custom board.

    There is no problem when using the EZBRD but my custom board fails in the enumeration process. The host computer

gives the error message (I am running on Linux with Windows in vmware):

[ 6850.136072] usb 5-3: device descriptor read/64, error -62
[ 6850.380093] usb 5-3: device descriptor read/64, error -62
[ 6850.620085] usb 5-3: new low speed USB device number 28 using ohci_hcd
[ 6850.760054] usb 5-3: device descriptor read/64, error -62
[ 6851.004084] usb 5-3: device descriptor read/64, error -62
[ 6851.244212] usb 5-3: new low speed USB device number 29 using ohci_hcd
[ 6851.652063] usb 5-3: device not accepting address 29, error -62
[ 6851.788077] usb 5-3: new low speed USB device number 30 using ohci_hcd
[ 6852.196066] usb 5-3: device not accepting address 30, error -62
[ 6852.196132] hub 5-0:1.0: unable to enumerate USB device on port 3

 

The problem may lie in the startup routines, I do adjust the PLL in the program with the following code:

void Init_PLL(void)
{
    u32 SIC_IWR1_reg;                /* backup SIC_IWR1 register */
   
    /* use Blackfin ROM SysControl() to change the PLL */
    ADI_SYSCTRL_VALUES sys_cntrl_struct;
    sys_cntrl_struct.uwVrCtl = 0x70F0;
    sys_cntrl_struct.uwPllCtl = 0x2000;        /* (25MHz CLKIN x (MSEL=16))::CCLK = 400MHz */
    sys_cntrl_struct.uwPllDiv = 0x0005;        /* (400MHz/(SSEL=5))::SCLK = 80MHz */

 

    SIC_IWR1_reg = *pSIC_IWR1;                /* save SIC_IWR1 due to anomaly 05-00-0432 */
    *pSIC_IWR1 = 0;                            /* disable wakeups from SIC_IWR1 */
  
    bfrom_SysControl( SYSCTRL_EXTVOLTAGE | SYSCTRL_VRCTL | SYSCTRL_WRITE |
                      SYSCTRL_PLLCTL | SYSCTRL_PLLDIV,
                      &sys_cntrl_struct, NULL);

 

    *pSIC_IWR1 = SIC_IWR1_reg;                /* restore SIC_IWR1 due to anomaly 05-00-0432 */
}

 

The core voltage is constant, 1.4V

I am still quite confused about the startup routines when initializing the SDRAM from an XML file

but the PLL from the main program but it seems to initialise the SDRAM correctly.

 

Attached is a screenshot with the USB and PLL registers for both the EZBRD and the custom board.

The EZBRD is on the right, USB_FADDR = 0005

Custom board on the left,   USB_FADDR = 0000

 

Does anyone have a clue why it doesn't work?

I did not find any anomaly in this processor version.

 

Regards

Gudjon

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