I am using the analog front end chip "AD9278/AD9279" with 50MHz sample rate. However, I have signal integrity problem on the trace of data output pins (DOUT+ / DOUT-) to my FPGA(output data frequency is 50MHz x 12bits / 2 = 300MHz in my case). I would like to do some signal integrity simulation before I send out the PCB gerber for the next versoin, but I cannot find the IBIS model of AD9278/79 on the website. Can anyone give me some suggestions on this ?
Thank a lot.