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BF707 PORTB Data register functionality in rlease mode

Question asked by kBhanu on Mar 28, 2018
Latest reply on Apr 2, 2018 by Jithul_Janardhanan

Hi, I configured the PortB Pin 15 as the CS for a SPI Flash. I configured the PORTB_FER as GPIO(Bit 15 as 0), and PortB_Dir as output(Pin15 as 0). While working in Debug Mode(ICE 2000) I am able to control the PortB_Data register Pin15 bit to generate the CS for the SPI device and actually see the physical(high to low transitions) signal on Scope. In this case I can perform the Read/write operations on SPI device. But running in release mode(free running) when I set the  PortB_data Register Pin15 to 0(from the log info) showing 0(when read back) for Pin15,  but don't see the transition on scope. I try to read the Read Status register and it seems like the wip bit is always 1 which indicates(my assumption) the CS is not working properly. Any clue why I can't see the CS transitions(high to low) eventhough the PortBData Register Pin15 bit shows 0? What else should I be looking to see what's going on?

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