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ADF4002 REFIN

Question asked by seung-gon on Mar 27, 2018
Latest reply on Mar 28, 2018 by Brigid.Duggan

Hi all,

 

I designed my PLL circuit using ADF4002, I have two questions about REFIN pin of ADF4002. It is specified the specification of REFIN on datasheet as below.

 

In my design, 1.8V CMOS square wave from a fanout buffer applied to REFIN of ADF4002. There is an ac-coupling capacitor (1nF)  between buffer and ADF4002.

1) I am curious if the ac-coupled square wave clock (Vp-p 1.8V) that applied to REFIN pin of ADF4002 meets the above specification. (VDD is 3.3V) 

2) Additionally, what is the "REFIN input sensitivity"? Is it the threshold as the VIH of the Logic Input? 

 

Thank you.

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