Can you please help me with the problem I meet when using the
ADS7_V2 and AD9164-FMC-EBZ. After I configure the related registers of
the AD9164 by the FPGA logic code, and I can see the jesd204b link
status is OK, the sync is high. But sometimes, there isn't any data
output. The bit3 of the register 0x024 is '1' I get, that is , the
signal JRX_DATA_READY is low when no data output, and the signal
JRX_DATA_READY is high when it can work. So, would you like to tell me
what's the JRX_DATA_READY mean? or how it happened to be low-level?
The sequence of configuring the register could make this happened or
other reason? Thank you!