when i use ADF4159 to generate a chirp signal(FMCW signal), because my loop filter is so narrow that the lock time is too long. My chirp time is very quickly. so i should improve the lock time . But how can i improve the lock time of ADF4159 and also do not change the loop filter because of phase noise.
i see it has CSR can improve the lock time . but when i open it , the loop is unlock.
The VCO is positive ,i have used the input divider buffer and i only set DB28 of register 2 to one.
Do i need to set anything else?