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AD9363 CONTROL OUTPUT overage

Question asked by Take_01 on Mar 22, 2018
Latest reply on Mar 27, 2018 by Vinod

I'm considering measuring the RSSI by operating the AD9363 in TDD mode in MGC mode.

 

1. Please let me ask a question about CONTROL OUTPUT overage.

 (1)AD9363 Reference Manual UG - 1040 Page 63 The following is written in Control Output 6 (Channel 1 Large LMT Overage).

"The Channel 1 large LMT overage signal transitions high when a large LMT overload occurs. The signal remains high until the gain changes. After a gain change, the signal transitions low even if the input signal exceeds the threshold because the gain control holds the LMT detect in reset until the peak wait time counter expires. If an overload still occurs, this control output transitions high again."

 

 Is it that Control Output state does not change in Control Output 6 (Channel 1 Large LMT Overage) after gain change even if the detection state of large LMT overage changes during the next gain change?
SPI Register 0x2B8 Bit D4 Large LMT Overload is the same as Control Output 6 (Channel 1 Large LMT Overage)?

 

 (2) Does the operation of (1) are the same for Control Output 5 (Channel 1 Large ADC Overage) and Control Output 4 (Channel 1 Small ADC Overage)?

 

2. Please let me ask a question about CONTROL OUTPUT ADC Low Power.

 

  AD9363 Reference Manual UG - 1040 Does Control Output 7 (Channel 1 ADC Low Power) on page 63 operate in the same way as Control Output 6 (Channel 1 Large LMT Overage)? Does the detection state change by gain change and does the detection state not change until the next gain change?
SPI Register 0x2B8 Bit D5 Is Low Power the same as Control Output 7 (Channel 1 ADC Low Power)?

 

Thanking you in advance.

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