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Inquiry about AD8003

Question asked by Dana17 on Mar 21, 2018
Latest reply on May 24, 2018 by Dana17
I want to apply (two amplifiers of) the AD8003 for L.O. buffer use in a various locations in a partially-discrete
low-frequency quadrature modulator application.  Important considerations are phase matching (both
within a single part and from part to part),  and distortion.  The part-to-part variation requirement is looser.
I'll be operating at frequencies ranging from 4MHz to 10 MHz.  I'd like to see part to part phase differences
of less than 1 degree, and within-device matching of around 0.1 degree.  The application requires multiple
channels driving antenna elements in a phased array.
Here are my questions:
1.  Is the part still being made?  The ADI website lists its status as
     "production", but one of the vendors I was looking at claims that
      the '8003 is no longer being made.
2. Are all three amplifiers on the same die?  It is important that the
     two I use are pretty-well matched so that the I & Q LO's retain
     their correct relative phasing.  My operating frequency range
     is merely 4MHz to 10MHz.
3. In the SPICE macromodel on ADI's web page for this part, can
     you tell me which component(s) to vary, and over what range,
     to reasonably simulate normal production variations in the
     transimpedance bandwidth?   This question is relevant to
     getting proper phases to the different antenna elements.
4. The datasheet seems to be saying that it's OK to electrically
     float the exposed paddle.  Does doing so carry any penalty
     vis-a-vis RF performance, RF AC stability, etc?  My load
     currents will be modest (probably no more than 20 mA peak
     on each of the two  amplifiers actually being used), and I 
     hope to avoid the need for soldering down the paddle.
5. Since I'd only be using two of the three amplifier sections, I'd
     naturally want to avoid power dissipation in the unused section.
     Is it OK to simply not connect power to the unused section at
     all, but perhaps tie all that section's pins to GND?  Doing so
     would minimize overall power, but would also save ECB
     space in what will probably prove a tight layout.
     If doing so is alright, which of the three sections should I
     best leave unpowered from the perspectives of thermal
     balancing of the other two sections and that of minimizing
     crosstalk?
Thanks,
Dana

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