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I  am required to implement a FIFO buffer of 34Mb in FPGA. Will XILINX's vertex 6 family FPGA be suitable for the requirement?

Question asked by SN@ on Mar 16, 2018
Latest reply on Mar 16, 2018 by lnagy

I am not having clear idea as to whether we can use both BRAM and distributed RAM available in Vertex 6 FPGA for 34Mb memory or not.

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