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AD9739 CLK Input

Question asked by Valentin_87 on Mar 14, 2018
Latest reply on Mar 23, 2018 by saberbf


In datasheet AD9739 in page 40:


It has been found through characterization that the optimum setting is for both inputs to be biased at approximately 0.8 V. This can be achieved by writing a 0x0F (corresponding to a −15) setting to both cross controller registers (that is, Register 0x22 and Register 0x23).

As we can see from datasheet default values of this registers = 0. What internal offset voltage is default on pins DACCLK? How this internal voltage changes by different values of registers?