The aim is to design multi channel high speed digital to analog converter system. for this AD5542A dac IC is being used. requirement is to obtain max speed available in IC.
The you are triggering the LDAC, it actually adds to your frame time. See Timing Diagram below:
If you want to maximize the frame rate, you should tie the LDAC pin to GND.
May I know exactly what are your requirements for your multichannel high speed DAC system? Maybe we could recommend a different part which is more suitable for your application.
Thanks, it was helpful. And the requirements for the multichannel high speed DAC system are : 16bit resolution, 3MSPS update rate per channel.
I am also looking for memory chips to store the input data which will provide the input to AD5542A dac ic. My requirements for memory chip are atleast 16K*16 memory organization and 50Hz clk rate. I have looked for FIFO MEMORY ICs, FPGA based ICs etc , but not able to get the desired one. So if you can suggest some it would be helpful.
The AD5542A can handle up to 3MSPS frame rate. You have to consider as well the output voltage settling time and slew rate especially if the output voltage steps that you are making are very large, i.e. from zero scale to full scale.
We can't recommend a part for your memory requirements though. Perhaps you could contact someone from the FPGA manufacturer for your requirements.
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