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Analog Synch on ADV7441A needs EXT_CLK

Question asked by jsly.vaddio on Dec 2, 2011
Latest reply on Feb 6, 2012 by mattp

I found a similar post on EXT_CLK on ADV7441A, while using an analog input YPbPr to the chip, the video out skips a few beats, and comes out shaky, so we also want to connect a separate chip to analog video to extract the clock and synch from video and feed that signal back to the ADV7441A EXT_CLK and EXT_CLAMP pins, and according to page 199 and up in the hardware manual, I can turn on this mode of external sync, buy writing register values:

Register 0x05       PRIM_MODE[3:0] to be 0x01

Register 0x06       VID_STD[4:0] to be 0x10

Register 0xC9[1]   EXT_CLK_EN to be 1

Register 0xC5[4]   EXT_VCLMP_REGEN to be 1

Register 0xBF[4]   EXT_VCLMP_POS_EDGE_SEL to be 0

 

After doing so my video goes from shaky 720p60 to nothing but black, I have measured the EXT_CLK and it is 74.5MHz, I can only guess that then the default values for synch delay are not correct and need to be adjusted.,  however the manual gives no good advice on how to adjust.  how do I adjust

Register 0xC6  CP_ANVC_POS_START[7:0]

Register 0xC7  CP_ANVC_POS_DURATION[7:0]

Register 0xC8  CP_DFC_POS_START[7:0]

 

my input is attached channel 2 is negative polarity signal on EXT_CLAMP and CH1 is analog video input Y

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