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How does digital tuning affect signal latency?

Question asked by jdwilson456 on Mar 8, 2018
Latest reply on Mar 8, 2018 by jdwilson456

Hi

 

I am trying to determine signal delay through the AD9361 chipset, and I have found that it seems to change on a power cycle. I think this is possibly caused by the digital tuning or something similar giving different results, presumably because of temperature changes or something.

 

Is this correct? If so, is there a way to read out certain registers to determine any extra lag or lead, compared with an arbitrary tuning?

 

Cheers,

Jonathan

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