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Address width of AXI util_adcfifo configuration

Question asked by MateoConLechuga on Mar 7, 2018
Latest reply on Mar 26, 2018 by CsomI

I have been looking through various reference designs and I am curious what the address width of the util_adcfifo controls. If I wish to stream ~500MB of data from an ADC core, does this mean I set the address width to 29? Or since it is a streaming block does the address just tell how large of a FIFO to construct for the DMA handoff? Thanks in advance.