When using the no os driver for AD9361, we are unable to set the sample rate to 459000 when using a 50MHz reference.
Here is our output, the driver print is in bold and the rest are our debug prints:
Req Sampling freq = 549000.000000
ad9361_calculate_rf_clock_chain: Failed to find suitable dividers: ADC clock below limit
Sampling freq = 8999999.000000
The AD9361_Filter_Wizard in Matlab shows that this rate is doable with the PLL clocked at 843.264 MHz, PLL Div set to 32 for an ADC rate of 26.352 MHz and a filter config of HB3 3x, HB2 2x, HB1 2x, FIR 4x.
Is this an unsupported rate for the no os driver?
Also, please note that we are using IIO Scope tagged "master-g01df380" and the latest no os driver.