I'm currently using AD725 to convert video from VGA to PAL. I've generate Hsync and Vsync signals specific to PAL signal generation in VHDL but i'm now having a problem with vertical rolling. In other words, when i send a test pattern, some lines are misplaced and when I plug in and unplug my svideo cable to the tv, the misplaced lines are somewhere else (with luck it could be good !!).
I'd like to know if there is a solution to get a fix picture without asking for "luck" !