AD797 : what is the SOA for the input differential voltage and feedback resistance, when rapid output saturation recovery is a design criterium?
I´ve noticed the AD797 is prone to latch the output in a saturated state, even when the input differential voltage is kept well within the Absolute Maximum Rating of +-0.7.
In a -10000 X gain circuit an external input is clamped to ground by two anti-parallell 1N5817 schottky diodes. This will keep the input clamped at +-400mV.
The input passes through a 100 Ohm resistor and to the negative input of an AD797 in inverting configuration. The feedback network is a 1M resistor in parallell with a 5pF capacitor + 100 Ohm resistor link.
The positive input is grounded.
Supply voltages are +-9V.
At times the AD797 will get into output saturation, and remain there until power is removed. When this happens, even with the input unconnected, the output goes to either + or - 7.5 V, and the positive input pin is at a few mV in the OPPOSITE polarity.
So, my conclusion is something in the input stage is drawing excessive current to cause the latched condition. As the feedback resistance is 1 M Ohm, the current must be over 7.5 uA.
Maybe it is simply a matter of having a low enough feedback resistance to allow the output to "force" the input to in-latch?
Is there any specification on overload recovery times over temperature and supply voltage?