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Audio Clock Regeneration Path on ADV7619

Question asked by kamei Employee on Nov 30, 2011
Latest reply on Dec 1, 2011 by vito



I would like to confirm the Audio Clock Regeneration Path on ADV7619.

I modified the Audio Clock Regeneration Path based on our ADV7441A HW manual a bit.

Please see it.


I think our ADV7619 is using the analog PLL for generating 128fs clk from TMDS clock.

And the digital PLL is used for generating MCLKOUT via divider circuit.

Is my understanding correct?


My customer is considering to improve audio performance by Xtal factor ( e.g. phase noise, jitter , deviation from reference frequency, etc..) now.

So, I asked above question.

Of course, as we know, TMDS jitter from HDMI source has big impact for HDMI audio performance.

But I would like to know if Xtal factor with ADV7619 has influence on the audio performance on the audio generation path also.


Can you give me your comments?


Thank you,