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PLL Clock Settings for maximum CoreClock for BF70x

Question asked by Michael.S on Feb 26, 2018
Latest reply on Feb 26, 2018 by Nabeel

I want to set the CoreClock frequency to 400MHz and I'm not sure if I understand the datasheet of the BF70x correctly. In the datasheet of the BF70x series at page 51 are in table 17 the core and system clock operation conditions. For a maximum core clock of 400MHz the PLLCLK restriction is 800MHz.

Does this mean i have to set up the PLLCLK to 800MHz and divide it by 2 by the CSEL value to get 400MHz of core clock or is it also possible to set the PLLCLK to 400MHz and pass (set CSEL to 1) the clock to get 400MHz of core clock?