I have a board that is daisy chaining 4x AD7765's and have it happily working in DEC_RATE = 0 (256x), BUT I cannot get 128x to work correctly.
Q1: What level do I set DEC_RATE to 128x? Do I drive it high or set it floating?
Here is a trace of it running in 128x where I have driven DEC_RATE = high
The bottom 4 signals contain the 4 channels parallel data where the LS status byte is set to 98'h
From AD7765 data sheet:
FILTER-SETTLE = '1', DEC_RATE 1 = '1', Don't care = '1' = 98'h
So, the 4x ADC's appear to think they are in 128x decimation.
Q2: Why is the NFSO timing incorrect? (i.e. the same as 256x decimation) Unless I misunderstand, NFSO should be running at double the rate. (i.e. no gap between CH1-4 sample bursts)
Note: If I set DEC_RATE to float I get 90'h (i.e. Don't Care = '0')
Thanks for any help!