I am trying to implement a PN sequence check in our FPGA design to verify the LVDS interface but have been unable to get synchronization. Is it true that the 9361 uses only a custom PN sequence (non-ITU standard)? I am attempting to implement the following polynomial.
x^16 + x^15 + x^14 + x^13 + x^12 + x^11 + x^10 + x^9 + x^8 + x^7 + x^6 + x^5 + x^3 + x^2 + 1
I understand that this sequence can be activated by using the following IIO driver command for the Rx side:
echo 2 > /sys/kernel/debug/iio/iio\:device0/bist_prbs
Are there any additional commands I need to send to activate the sequence, or is that the only one?
Also, in FDD, 2RX-2TX mode, is the same sequence being sent on I0, Q0, I1 and Q1, with the Q channels in reverse order?
Any additional info you could provide would be appreciated. I need to get our interface verified.