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Analog AXI_DMAC

Question asked by simchak on Feb 21, 2018
Latest reply on Feb 21, 2018 by larsc

Hi,

Why does Analog use its own IP for DMA transfers in its HDL base design for FPGA based demonstration systems?

High-Speed DMA Controller Peripheral [Analog Devices Wiki] 

What is the problem with the various existing Xilinx IP cores for DMA transfers?

 

Thank you.

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