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AD9913 start-up phase consistency

Question asked by fossil on Feb 20, 2018
Latest reply on Feb 21, 2018 by fossil

I have a half dozen AD9913's in parallel, each driven by the same 150 MHz clock. The outputs are set for about 49 MHz, but spaced 2 kHz apart. The PLL multiplier is not used. Whenever one or more DDS parts starts up, will the output always start at the same phase position, eg will the 0-degree point on the output signal on start-up line up with the leading edge of the 150 MHz clock (plus latency cycles) or some other reference point?
Thank you