If I read the linked thread carefully, it seems that the synchronization is
lost between two or more AD9915 chips if one of the Clear bits is set
CFR1 [3:6]. In my application I have 8 synced AD9915 which needs to be
programmed with a frequency/phase/ amplitude and frequency/phase amplitude modulated
for a few milliseconds. They then will be switched off for a few seconds and start again with
a different frequency/phase amplitude and again run for a few milliseconds.
By now I thought I use the Clear Phase Accumulator Bit to start with a rising slope every time
the AD9915 are programmed, but that seems not to be possible.
How can I make sure all the AD9915 start with a rising slope every time they are reprogrammed?