I have a perplexing issue with an AD7705. When I set up the chip to give an update rate of 60Hz, I get 12Hz instead. When I set it up for 250Hz, I get 50Hz (but data ready only goes low for a very brief instant in this case). I called the help line and the support engineer couldn't think of any obvious way this could happen, so I'm trying this forum. I've attached scope traces of the main signals involved (clock start-up, clock, data in, data out, not data ready). The chip is in a DIP package and is mounted on a proto board at the moment, which may account for some of the poor shaping of the signals in the attached traces (PCB is arriving thursday). We are using a 2.4MHz clock, setting the clock register to 0x05 (60Hz), and the setup register to 0x40. After this setup the data ready pin goes low at only 12Hz rather than 60. We did put a (slow) sine wave on the input and plot the digitized output and the chip seems to be working properly, just slow.