We are conceiving a weather radar system using AD9364.
We generate a 1GHz CW signal with 2us pulses, using GNU Radio (Python) on Zed Board.
We need to output the pulsed enveloppe to drive a power amplifier. As this enveloppe is a logic signal, we plan to output it using the FPGA.
Do you have any reference design or any advice for such architecture?