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ad9361_verify_fir_filter_coef() fails for TX FIR x2

Question asked by lkuznetsov on Feb 12, 2018
Latest reply on Feb 12, 2018 by mhennerich


Hello,
we've got some problems initializing FIR-filters with No-Os driver (HEAD-commit from git-repo: 317248e61115277fa0ba5733f466ae89247e6a90).

 

When TX.FIR set to x2-interpolation ad9361_verify_fir_filter_coef() always reports coefficients-write fail.
For configs with TX.FIR x1 coefs are written correctly.
Rx coefs are written correctly no matter what.

 

For debug purposes I've write 1-128 sequence as FIR-coefficients.
Also I've tried to immediately read values that are written in ad9361_load_fir_filter_coef() driver-function and they are correct (I've temporary added spi_read after spi_write trunsactions in coef-write for-loop).
So I've got confused whether coefficients are written correctly or not.

Please, could you examine our initialization procedure and verify is it correct.

 

Our initialization procedure looks like that:
1. Initialize ad9361 with some default parameters (see default.c attachment)
2. Set FIR-filters and system-rates

// configure_fir_filters():
//--- Set Configuration variables
//--------------------------------------
// system bandwidth (40MHz for example)
uint32_t bwHz = 40000000

// system rates
// BBPLL, HB3/INT3, HB2, HB1, ProgFIR, SampleRate
static const uint32_t tx_rates[6] = {1080000000, 270000000, 90000000, 90000000, 90000000, 45000000};
static const uint32_t rx_rates[6] = {1080000000, 540000000, 180000000, 90000000, 90000000, 45000000};

// tx_fir config (coefs are chosen to show read/write issue)
uint8_t tx_len = 96;
uint32_t tx_int = 2;
static int32_t tx_fir[128] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128};
// rx_fir config (coefs are chosen to show read/write issue)
uint8_t rx_len = 96;
uint32_t rx_dec = 2;
static const int32_t rx_fir[128] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128};

// initialize fir-structures
AD9361_TXFIRConfig tx_fir_config = {
3, // tx;
-6, // tx_gain;
tx_int, // tx_int;
{0}, // tx_coef[128];
tx_len, // tx_coef_size
{0}, // tx_path_clks[6]
bwHz // tx_bandwidth
};
AD9361_RXFIRConfig rx_fir_config = {
3, // rx;
0, // rx_gain;
rx_dec, // rx_dec;
{0}, // rx_coef[128];
rx_len, // rx_coef_size
{0}, // rx_path_clks[6]
bwHz // rx_bandwidth
};

// copy path_clocks and fir_coefs from config-arrays to config-structures
// ... ...
//--- Call ad9361-driver functions
//--------------------------------------
// set tx,rx fir configs
if (ad9361_set_tx_fir_config(m_ad9361Phy, tx_fir_config)) {
printf("\tFAILED: TX FIR Filter configuration\n");
result = -1;
}
if (ad9361_set_rx_fir_config(m_ad9361Phy, rx_fir_config)) {
printf("\tFAILED: RX FIR Filter configuration\n");
result = -1;
}

// set trx-fir enable
if (ad9361_set_trx_fir_en_dis(m_ad9361Phy, 1)) {
printf("\tFAILED: TX-RX FIR Filter enable\n");
result = -1;
}

// set rates
if (ad9361_set_trx_path_clks(m_ad9361Phy, rx_fir_config.rx_path_clks, tx_fir_config.tx_path_clks)) {
printf("\tFAILED: trx-path-clock setting\n");
result = -1;
}

I've add some addtitional printf's to validate-FIR output (to get more verbose message) and obtain the following:

ad9361_load_fir_filter_coef: TAPS 96, gain -6, dest 3
Device is in a state, forcing to 5
ad9361_verify_fir_filter_coef: TAPS 96, dest 3
TX1 read verify passed TAP0 1 == 1
TX1 read verify failed TAP1 3 =! 2
TX1 read verify failed TAP2 5 =! 3
TX1 read verify failed TAP3 7 =! 4
... ...
TX1 read verify failed TAP29 28 =! 30
TX1 read verify failed TAP30 30 =! 31
TX1 read verify passed TAP31 32 == 32
TX1 read verify passed TAP32 33 == 33
TX1 read verify failed TAP33 35 =! 34
TX1 read verify failed TAP34 37 =! 35
... ...
TX1 read verify failed TAP61 60 =! 62
TX1 read verify failed TAP62 62 =! 63
TX1 read verify passed TAP63 64 == 64
TX1 read verify passed TAP64 65 == 65
TX1 read verify failed TAP65 67 =! 66
TX1 read verify failed TAP66 69 =! 67
... ...
TX1 read verify failed TAP94 94 =! 94
TX1 read verify failed TAP94 94 =! 95
TX1 read verify passed TAP95 96 == 96
... ... (The same results for TX2 are omitted)
FAILED: TX FIR Filter configuration

ad9361_load_fir_filter_coef: TAPS 96, gain 0, dest 131
Device is in a state, forcing to 5
ad9361_verify_fir_filter_coef: TAPS 96, dest 131
... ... (All reads are passed and omitted)
PASSED: RX FIR Filter configuration

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