Hi I had some questions regarding the external reference and about timing:
1. From other question in the forum it was established that no sampling rate lower than 10Ksps is allowed. However would I be able to get 500sps (2ms sampling period) by hibernating the ADC in between samples? (I know I would have to use an external voltage reference since the internal requires 3.5ms upon power up). Something like the operation profile shown below:
2. For an external voltage reference what would be the expected load it would have to handle?
3. If I use an external reference could its voltage be 1V for example (even at the expense of some resolution) or does it necessarily have to be 1.25 or 2.5V?
4. The datasheet mentions a mean current consumption of 104uA at 100Ksps for 1.8V supply and the internal reference in low power mode, do you know in which configuration conditions this value was measured , ACLK frequency, sampling time ...? Would it be possible to estimate the consumption at 10Ksps with and without the reference buffer?
5. The ADC Optimization Application note AN-1457 mentions that using an external reference reduces ADC consumption by 200uA but it was not clear if it was from the overall chip consumption or just the ADC.