I have followed the steps at https://wiki.analog.com/resources/fpga/docs/build
and I was able to compile the FPGA code for the ZC706 and ADRV9371.
(Note that during compilation, "make" warns me several times about modification dates in the future)
I update files from
and using SDK I could create a Boot Image that works. Not 100% tested of course, but HDMI works, and I can do some simple things with the ADRV9371.
Now I try to open the project in the GUI of Vivado 2016.2: \projects\adrv9371x\zc706\adrv9371x_zc706.xpr. Is it bad?
Note that if I Open the Implemented Design, I see some (high severity) warnings in the timings:
no_input_delay on some signals related to DDR3, IIC, tx_sync, ...
no_output_delay on some signals related to HDMI, IIC, rx_*sync, ...
If I copy only the \projects\adrv9371x\zc706\ sub-directory somewhere else and try to open the XPR file, a few files are missing (ad_iobuf.v and 3 xdc files), but I could find and copy them also.
I managed to do some minor changes to the system_top.v (playing with LEDs and Switches), recompile the code and test it.
But if I want to change the Bloc Design, things get complicated: the Generate Output Product fails, apparently because it searches files from there absolute paths (and they are missing).
If I copy the whole \projects\ directory, it is not really better, because of the absolute paths: the old project get corrupted.
How to copy the project and modify it?
Alternatively, what is the correct way to modify the source files? Do I have to compile only with "make"? I experienced with another kit that "make" copies (and create ?) some files, and it is difficult to find the original one. For the Bloc Design, it might be difficult to edit the text files.
To be complete, I work under Windows and I use "make" in a Linux virtual machine, that is (also) why the paths gets completely wrong when I copy the project from the virtual machine to my ordinary space. I might try with Cygwin, but as far as I understand, it will never allow to copy the project.