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AD9642 Output Test Modes

Question asked by phillipsrb on Feb 1, 2018
Latest reply on Feb 8, 2018 by J.Harris

Re AD9642 - User Test Modes - Register 0x0D
In the device data sheet bit 6 of this register is described as "open". However, according to AN-277 page 11 Output Test Modes this bit is required along with Bit 7 to specify which User Test Pattern(s) is(are) loaded onto the output and in which way. Has anyone found out/knows the correct resolution of this discrepancy?

Robert Phillips

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