I have a question about how to get "FLD" status in use of 1PPS reference input.
Now I'm trying to get "FLD" status in condition of 1PPS reference input using AD9545/PCBZ.
The output of AD9545 looks like locked to REF input by observing OUT0A and REFBB input.
The settings of AD9545 are followings.
System Clock : 52MHz (on board X'tal)
Output Frequency: OUTP0A ... 10MHz , OAre there more settings need to AD9545 ?UTP0B ... 50MHz , OUTP0C ... 10MHz
REFA / REFAA : Power Down
REFB : Power Down
REFBB : 1Hz , Single Ended , DC_Coupled_1.2V_CMOS
DPLL0 : Enable , Priority ... 0 , Ref.Source .. REFBB , Feedback Source ... NCO0 , Loop BW ... 50mHz
Frequency Lock Threshold : 0xFE0000 ... 16.65usec
I Attach three figure files.
The one is a UI of ACE, and other two are waveforms of REFBB, OUT0A and OUT0B.
The 1PPS is generated by function generator which consists of DDS.
The 10MHz reference clock of this F.G. is supplied from Agilent N5181A REFOUT.
In observing the relation between 1PPS and OUT0x waveforms , there are slow fractuation between the phase. But the range of fractuation is about 50ns. This fractuation range is smaller than "Frequency Lock Threshiold".
Is there more settings need to AD9545 ?
Please let me know your advice ?