Hi all,

I have seen some questions regarding the performance of the FIR accelerator on the 215xx processor but unfortunately could not find a direct comparison of the max throughput.

So, correct me if I am wrong (and I hope somebody does ...):

Given the formulas from the processor hardware refererences for both platforms

215xx: (195 + 2 × N × 11 + W × (N/4+2) ) × C SCLK cycles

214xx: (49 + 4 × N +W(N/4 + 2)) × C PCLK cycles

where

N = 512 taps, W=16 samples and C = 8 channels

I get

215xx: 108312 SCLK cycles

214xx: 33416 PCLK cycles

Assuming a sampling rate of 48 kHz, 214xx PCLK = 225MHz and 215xx SCLK = 125MHz, with 16 samples block processing, this means, that the processing load is

214xx: 44.5% of the max available processing time

215xx: 260% of the max available processing time

which means that the 215xx is not able to process what the 214xx can do while yawning and painting it's fingernails.

Questions:

Is my assumption that the max SCLK is 125 MHz and the accelerator runs on this correct?

Is the performance really that bad?

Best regards,

Rainer

Hi Rainer,

As you mentioned correctly, the performance of FIR accelerator in the ADSP-214xx is more compared to ADSP-215xx processors. This is because the FIR accelerator in ADSP-214xx runs on CCLK/2 whereas the ADSP-215xx runs on CCLK/4

Thanks,

Jithul