AnsweredAssumed Answered

Why set Interface_Mode_Register invalid?

Question asked by dannyhuang on Jan 22, 2018
Latest reply on Apr 1, 2018 by JellenieR

I want to make the status register to be appended to the data register when read so that channel and status information are transmitted with the data, so I set the DATA_STAT=1 in Interface_Mode_Register,but never has changed,Why?   In order to test, I set the IFMode Register to 0x0001,normally the AD DATA will change to 16 bit, in fact the AD DATA is  still  24 bit.So Why set Interface_Mode_Register invalid?

 

Here is setup code:

int32_t AD7175_Setup(void)
{
    int32_t ret;   
    /* Initialize ADC mode register */
    ret = AD7175_WriteRegister(AD7175_regs[ADC_Mode_Register]);
  ret = AD7175_ReadRegister(&AD7175_regs[ADC_Mode_Register]);
    if(ret < 0)
        return ret;    
    /* Initialize Interface mode register */

  ret = AD7175_WriteRegister(AD7175_regs[Interface_Mode_Register]);
  ret = AD7175_ReadRegister(&AD7175_regs[Interface_Mode_Register]);
    if(ret < 0)
        return ret;
    //AD7175_st.useCRC = INTF_MODE_REG_CRC_STAT(AD7175_regs[Interface_Mode_Register].value);   
    /* Initialize GPIO configuration register */
    ret = AD7175_WriteRegister(AD7175_regs[IOCon_Register]);
    if(ret < 0)
        return ret;   
    /* Initialize Channel Map registers */
  ret = AD7175_WriteRegister(AD7175_regs[CH_Map_1]);
  ret = AD7175_ReadRegister(&AD7175_regs[CH_Map_1]); 
    if(ret < 0)
        return ret;  
    ret = AD7175_WriteRegister(AD7175_regs[CH_Map_2]);
  ret = AD7175_ReadRegister(&AD7175_regs[CH_Map_2]); 
    if(ret < 0)
        return ret;  
    ret = AD7175_WriteRegister(AD7175_regs[CH_Map_3]);
  ret = AD7175_ReadRegister(&AD7175_regs[CH_Map_3]); 
    if(ret < 0)
        return ret;   
    ret = AD7175_WriteRegister(AD7175_regs[CH_Map_4]);
  ret = AD7175_ReadRegister(&AD7175_regs[CH_Map_4]); 
    if(ret < 0)
        return ret;    
    /* Initialize Setup Configuration registers */
    ret = AD7175_WriteRegister(AD7175_regs[Setup_Config_1]);
  ret = AD7175_ReadRegister(&AD7175_regs[Setup_Config_1]);
   if(ret < 0)
        return ret;
    ret = AD7175_WriteRegister(AD7175_regs[Setup_Config_2]);
  ret = AD7175_ReadRegister(&AD7175_regs[Setup_Config_2]);
    if(ret < 0)
        return ret;
    ret = AD7175_WriteRegister(AD7175_regs[Setup_Config_3]);
  ret = AD7175_ReadRegister(&AD7175_regs[Setup_Config_3]);
    if(ret < 0)
        return ret;
    ret = AD7175_WriteRegister(AD7175_regs[Setup_Config_4]);
  ret = AD7175_ReadRegister(&AD7175_regs[Setup_Config_4]);
    if(ret < 0)
        return ret;

    /* Initialize Filter Configuration registers */
    ret = AD7175_WriteRegister(AD7175_regs[Filter_Config_1]);
    if(ret < 0)
        return ret;
    ret = AD7175_WriteRegister(AD7175_regs[Filter_Config_2]);
    if(ret < 0)
        return ret;
    ret = AD7175_WriteRegister(AD7175_regs[Filter_Config_3]);
    if(ret < 0)
        return ret;
    ret = AD7175_WriteRegister(AD7175_regs[Filter_Config_4]);
    if(ret < 0)
        return ret;

    return ret;
}

 

st_reg AD7175_regs[] =
{
   {0x00, 0x00,   1}, //Status_Register
   {0x01, 0x8000, 2}, //ADC_Mode_Register
  {0x02, 0x0001, 2}, //Interface_Mode_Register
  {0x04, 0x0000, 3}, //Data_Register
  {0x05, 0x0000, 2}, //IOCon_Register
  {0x07, 0x0000, 2}, //ID_st_reg
 {0x10, 0x8004, 2}, //CH_Map_1
 {0x11, 0x8004, 2}, //CH_Map_2
 {0x12, 0x0000, 2}, //CH_Map_3
 {0x13, 0x0000, 2}, //CH_Map_4
 //{0x20, 0x1300, 2}, //Setup_Config_1
 {0x20, 0x0300, 2}, //Setup_Config_1 BI_UNIPOLAR0
 {0x21, 0x1300, 2}, //Setup_Config_2
 {0x22, 0x1300, 2}, //Setup_Config_3
 {0x23, 0x1300, 2}, //Setup_Config_4
 {0x28, 0x020A, 2}, //Filter_Config_1
 {0x29, 0x0200, 2}, //Filter_Config_2
 {0x2a, 0x0200, 2}, //Filter_Config_3
 {0x2b, 0x0200, 2}, //Filter_Config_4
 {0x30, 0, 3}, //Offset_1
 {0x31, 0, 3}, //Offset_2
 {0x32, 0, 3}, //Offset_3
 {0x33, 0, 3}, //Offset_4
 {0x38, 0, 3}, //Gain_1
 {0x39, 0, 3}, //Gain_2
 {0x3a, 0, 3}, //Gain_3
 {0x3b, 0, 3}, //Gain_4
 {0xFF, 0, 1} //Communications_Register
};

Outcomes