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AD5293 VDD/VSS decoupling capacitances

Question asked by EVC on Jan 19, 2018
Latest reply on Jan 31, 2018 by EVC

I need some advice about decoupling capacitances. Data sheet says VDD and VSS should be decoupled with 0.1uF and 10uF capacitors. The problem is I have around 150 digipots in the design so capacitors, especially the 10uFs, will demand a lot in terms of bord real state and power supply.

 

What do you suggest? One 10uF for each line, one every N digipots?

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